1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof.
2. Description of the Related Art
A so-called flat panel display (FPD) typified by a liquid crystal display device has characteristics of being thin and low power consumption. Therefore, flat panel displays are widely used in various fields. Among them, since an active matrix liquid crystal display device having a thin film transistor (TFT) in each pixel has high display performance, the market size is remarkably being expanded.
A plurality of scanning lines and signal lines is formed over an active matrix substrate used for an active matrix display device and these wirings intersect with each other with an insulating layer interposed therebetween. Thin film transistors are provided close to an intersection portion of the scanning line and the signal line and each pixel is switched (e.g., see Patent Document 1).
[Reference]
[Patent Document]
    [Patent Document 1] Japanese Published Patent Application No. H04-220627
Here, electrostatic capacitance (also called “parasitic capacitance”) is formed in the intersection portion of the scanning line and the signal line because of its structure. Since parasitic capacitance causes signal delay or the like and makes display quality decreased, a capacitance value thereof is preferably small.
As a method for reducing parasitic capacitance which is generated in the intersection portion of the scanning line and the signal line, for example, a method for forming an insulating film thick which covers the scanning line is given; however, in a bottom-gate transistor, a gate insulating layer is formed between the scanning line and the signal line, whereby, driving capability of a transistor is decreased in the case where the gate insulating layer is simply formed thick.